Publications
Master's Thesis
Contributions to Research
During my master's program at Virginia Tech, I made significant contributions to the field of computer engineering through my research on tampering, reverse engineering, and counterfeiting of integrated circuits (ICs). My work focused on developing innovative solutions to enhance the security and authenticity of ICs. Below are the key contributions of my research:
1. Hardware Obfuscation
Objective: To protect ICs from unauthorized access and tampering by concealing the functional mode of the controller.
Approach: I developed a novel hardware obfuscation technique that involves sophisticated design strategies to hide the functional mode of the controller. This technique ensures that the controller becomes operational only upon the formation of a specific interlocked code-word during state transitions. By expanding the state space and integrating code-word logic, the obfuscation method effectively prevents reverse engineering and tampering attempts.
Implementation: The obfuscation technique was implemented on AES and DES benchmark circuits. The results demonstrated low area overheads (7.8% for AES and 18.66% for DES) while maintaining high levels of security.
Impact: This innovative approach significantly enhances the security of ICs, making it more difficult for attackers to reverse engineer or tamper with the hardware. The research was published in the paper “Interlocking Obfuscation for Anti-Tamper Hardware” presented at the Cyber Security and Information Intelligence Research Workshop (CSIIRW’13).
2. Tamper-Resistant Time-Stamp Circuit
Objective: To detect counterfeit ICs by providing a tamper-resistant manufacturing date.
Approach: I proposed a time-stamp method using a Linear Feedback Shift Register (LFSR) with a constrained tap configuration to provide the manufacturing date. The time-stamp circuit is designed to be tamper-resistant by modifying state transitions in the entry mode to depend on the LFSR value. This ensures that any tampering attempts result in an invalid time-stamp.
Implementation: The time-stamp circuit was implemented on AES and DES benchmark circuits, showing an area overhead of only 0.3% for AES and 1.189% for DES. The tamper-resistant version incurred slightly higher overheads but provided robust protection against counterfeiting.
Impact: The tamper-resistant time-stamp circuit offers a practical solution for detecting counterfeit ICs, enhancing the overall security and authenticity of hardware designs. This research was published in the paper “Anti-Counterfeit Integrated Circuits Using Fuse and Tamper-Resistant Time-Stamp Circuitry” at the 2013 IEEE International Conference on Technologies for Homeland Security (HST).
3. SIMD Acceleration of Modular Arithmetic on Contemporary Embedded Platforms
Objective: To improve the performance of modular arithmetic operations on embedded platforms using SIMD (Single Instruction, Multiple Data) acceleration.
Approach: As part of a project in the Security of Handheld Devices class, I explored the use of SIMD instructions to accelerate modular arithmetic operations on contemporary embedded platforms. This involved optimizing the implementation of modular arithmetic algorithms to leverage the parallel processing capabilities of SIMD.
Implementation: The optimized algorithms were tested on various embedded platforms, demonstrating significant performance improvements compared to traditional implementations.
Impact: This work showcased the potential of SIMD acceleration to enhance the performance of cryptographic operations on embedded devices, contributing to the advancement of secure computing. The research was published in the paper “SIMD Acceleration of Modular Arithmetic on Contemporary Embedded Platforms” at the 2013 IEEE High Performance Extreme Computing Conference (HPEC).
Peer Reviews
In addition to my research contributions, I actively participated in the peer review process for papers in my research fields of anti-counterfeit, anti-tamper, and hardware obfuscation. This involvement highlights my expertise and commitment to maintaining high standards in scholarly work.